1. Field of the Invention
The present invention relates to a semiconductor device and a manufacturing method thereof, and more particularly, to a semiconductor device including one memory gate disposed corresponding to two charge storage structures for increasing the element density and a manufacturing method thereof.
2. Description of the Prior Art
Semiconductor memory devices are used in computer and electronics industries as a means for retaining digital information or data. Typically, the semiconductor memory devices are divided into volatile and non-volatile memory devices depending on whether the data stored in the memory devices is completely lost or not in case of power interruption. The non-volatile memory devices, which can retain their data even when the power supply is interrupted, have been widely employed. As one kind of the non-volatile memory technology, a SONOS memory structure is to build a silicon nitride layer sandwiched between two silicon oxide layers for serving as the charge trap layer while the two silicon oxide layers respectively serve as a charge tunnel layer and a charge block layer. This oxide-nitride-oxide (ONO) multilayered structure is formed between a semiconductor substrate and a silicon floating gate, and thus a SONOS memory structure is constructed.
Since the microprocessors have become more powerful, requirement to memory devices of large-capacity and low-cost is raised. To satisfy such trend and achieve challenge of high integration in semiconductor devices, memory miniaturization is kept on going, and thus fabrication process of memory structure is getting complicated. Therefore, it is always a target for the related industries to effectively enhance integrity and electrical performances by modifying the designs.